In recent years, an increased demand for higher data-rate wireless communications has arisen. This demand has led to the widespread adoption of non-constant envelope modulation which presents higher spectrum efficiency for data transmission. Conventional systems applying non-constant envelope modulation require use of linear power amplifiers (PAs). However, the power efficiency of linear power amplifiers is still low as compared to non-linear power amplifiers. Thus, in mobile applications this shortens the battery life. In order to improve amplifier efficiency and reduce costs and, at the same time, achieve the required level of linearity, various linearization techniques have been developed. These techniques include e.g. Cartesian loop architecture, pre-distortion, and feed-forward techniques. However, the efficiency of these techniques remains limited due to the use of linear power amplifiers.
In view of this, the more ambitious way for achieving improved power efficiency is to use polar loop technique or LINC (Linear Amplification by Nonlinear Components) in which non-linear power amplifiers are employed and thus higher power efficiency can be achieved. However, with such a technique as well, problems occur which will be described in the following.
For example, a polar transmitter comprises two paths to process the phase signal and the amplitude signal independently. Further, for processing the amplitude signal two types of amplitude modulation (AM) can be found, namely i) supply modulation and ii) direct envelope modulation. Now, the problems occurring with respect to these two different types of amplitude modulation will be described.
i) A polar loop with supply modulation may be formed as shown in FIG. 1, for example. In the phase path, a VCO (voltage-controlled oscillator) modulated by the phase signal feeds the input of a non-linear power amplifier (non-linear PA). In the amplitude path, simultaneously the power supply of the non-linear power amplifier is modulated by the amplitude signal by use of a DC-DC converter. In this arrangement, phase and amplitude information are independently processed but digitally synchronized. As a consequence, both signals can be transmitted without sacrificing performance parameters. However, in practice the bandwidth of the DC-DC converter in the amplitude path is limited. Further, in the amplitude modulation path, spectrum re-growth occurs which leads to a much larger bandwidth than that of the desired RF output signal. Due to this, such an arrangement using the DC-DC converter is only suitable to standards for data transmission with a very narrow bandwidth, such as GSM and EDGE standards. A possible way to cope with this problem is to use a linear regulator instead of the DC-DC converter or a combination of DC-DC converter and linear regulator. However, this leads to a reduction in power efficiency.ii) On the other hand, a polar transmitter with direct envelope modulation can e.g. be formed as shown in FIG. 2. Such a polar transmitter has been disclosed by van Zeijl and Collados in “A Multi-Standard Digital Envelope Modulator for Polar Transmitters in 90 nm CMOS”, RFIC Symposium, 2007 (reference [1]). The polar transmitter of FIG. 2 comprises a binary weighted transistor array having a lower row of transistors and an upper row of cascode transistors. The binary weighting of the respective transistors is indicated by the numbers (1, 2, 4, 8, . . . ). In this example, the gates of the transistors in the lower row of transistors are driven by a phase-modulated signal RF input. The bias of the gate of the respective transistors determines the current flowing in the respective unit. The cascode transistors in the upper row are controlled by signals b0 to b7. Depending on the signals b0 to b7, the cascode transistors switch on/off the phase-modulated current from the lower row of transistors. As a result, envelope information and phase information are combined at the RF output. Similar approaches adopting different unit cell configurations can be found. Such a direct digitally envelope-modulated polar transmitter overcomes the bandwidth limit which has been described above with respect to supply modulation technique. As a consequence, such a polar transmitter is suitable for software-defined radio (SDR). However, in real implementation a problem occurs that the binary weighted array cannot guarantee a monotonic output current. This is due to an inevitable mismatch of the employed transistors.
In order to overcome this problem, for direct digitally envelope-modulated polar RF transmitters it has been proposed to employ a thermometer-decoded unit matrix in which each unit cell has the same configuration and is switched on and off by decoding the binary data. This is also disclosed by van Zeijl and Collados in the above reference [1].
In this context, it should be noted that the digitally envelope-modulated polar RF amplifier is essentially a digital-to-RF power converter. The discrete-time to continuous-time conversion introduces spectral image at the offset of the sampling clock and its higher order harmonics. This may violate the spectral mask and the constraints with respect to out-of-band emissions. There are two principles which can be exploited to suppress these unwanted spurs; on the one hand, the sampling frequency can be increased and the input can be interpolated and, on the other hand, the output of the amplifier can be filtered. However, filtering the output requires an extra LC tank and frequency tuning. Thus, for on-chip integration this is disadvantageous because it results in large chip area and complex circuitry.
As a consequence, N-fold linear interpolation combined with over-sampling is more preferred. In reference [1], four-fold linear interpolation is established for thermometer-coded envelope-modulated polar amplifiers by splitting the output stage into four parallel unit matrixes which are sequentially switched by four quadrature-phased sampling clocks.
Further, recently the direct digital RF modulator approach has been proposed for RF transmitters. According to this approach, the digital-analog converter (DAC) and the up-conversion mixer are combined to a common unit. A possible implementation of this approach has been disclosed by Jerng and Sodini in “A Wideband Digital-RF Modulator for High Data Rate Transmitters”, IEEE Journal of Solid-State Circuits, Vol. 42, No. 8, August 2007 (reference [2]). However, in this approach similar problems with respect to the image spectrum occur as in the direct envelope modulator. Thus, also according to this approach input interpolation or RF filtering is needed to lower the spur level. Again, input interpolation is preferred due to the features explained above.
To summarize, to suppress the spectral image introduced in a digitally envelope-modulated polar RF amplifier or in a direct digital RF modulator, oversampling and input interpolation is favored. However, in the known concepts for input interpolation, adopting input interpolation nearly quadruples the size of the output stage, since the size of the unit cell is dominated by the local decoding logic inside the unit. In particular, as more bits are needed in UMTS or other standards, the total size of the output stage may exceed the inductor size when the output matching network is integrated in chip. As a consequence, the operating frequency is limited.